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| the l4955 uldo (ultra low dropout) linear regulators family is realised in bcdii technology, first and unique example of a multi-amps regulators making use of an n-channel lateral d-mos transistor, versus the most common solution of a power bipolar pass element. benefits in using such a power device is to have a quiescent current constant and independent from load current situations as well as very fast line and load transients. the product family includes a full feature device in heptawatt package, with output adjustable, inhibit, power good, external limiting current, and fixed (or adjustable) versions in to-220. the fixed outputs are 3.3v, 5.1v and 12v, the most common standard output voltages. the min. regulated output voltage is 1.26v, while the input voltage is ranging from 4.5v to 22v. the heptawatt version, full feature, makes this device useful for systems using improved power man- agement solutions, to supply advanced m -processors (see fig. 1). moreover, due to its ability to regulate the output current it can be used as a post-regulator in many dif- ferent applications covering up to 5a maximum current. an electrolytic capacitor of 22 m f is requested for output stability, while 10 m f min are requested on input supply voltage. august 1998 ? AN932 application note l4955 family, application guide by domenico arrigo c1 r1 r2 c2 vout vin 1 2 in cl gnd 4 3 inh 7 out 5 adj l4955 pg 6 d97in552a m p r cl figure 1. l4955 typical application. 1/20
why linear regulators ? the operation of a linear regulator is very simple and simple is also the application topology. the output voltage is determined by the difference between the input voltage and the voltage drop of the pass element, which is modulated by the current flow and input voltage variations. benefits of a linear regulator versus the switchers are : - lower application cost. - simpler topology. - less external components (two caps, a voltage divider on adjustable types) versus switchers and discrete solutions. - easier layout precautions. - zero output ripple. - 10-15 times faster load transients response time versus switchers. - ideal for post-regulation in multioutputs smps, comprehensive of limiting current and thermal shutdown. linear regulators evolution starting from the early 80's, the famous standard linear l78xx series has been developed with a dar- lington transistor as the pass linear power element, driven by a pnp transistor (see fig. 2). it was an in- novative solution for that time, in which the output power stage high gain was limiting the operating qui- escent current to a few ma, irrespective of the load. the main drawback, discovered some years later, was the min. dropout voltage of a couple of volt at 1a. it was not anymore acceptable for new emerging automotive applications. min dropout is: vbe1 + vbe2 + vcesat3. able to reduce the dropout to values lower than 2v were the olow dropouto regulators, in the '82 and '83. the power stage was realised with an npn transistor, driven directly by a pnp type. example of this design solution is the l2600 family, automotive oriented because able to regulate 5v output with 7v min. supply voltage coming from car battery. fig.3 shows the power stage topology: the dropout is equal to vcesat1+vbe1, lower than 1.5v, while the operating quiescent current was kept at reasonable values. further requirements, around middle 80's were to have regulation on the 5v output, with about 6v of min. input supply voltage. this generated the need of new overy low dropo regulator families (see fig. 4), like l4940, l4941 and l48xx family, using a single pnp transistor as the power element lateral first, followed by a vertical solution around '85. q1 q2 q3 v in v out v ref - + e/a d97in598 figure 2. standard darlington regulator. q1 q2 v in v out v ref - + e/a d97in599 figure 3. low drop regulator with npn transistor. AN932 application note 2/20 in this case, the min dropout is one vcesat only, around 1v at 1a. the weakness of this solution is the quiescent cur- rent, growing proportionally to the output load cur- rent, in particular when the input supply is close to the output voltage, i.e., when the power element is close to saturation. this causes efficiency problems in applications sup- plied with batteries and so limited autonomy. on the second half of 80's, mos transistors, a new way to manage power, opened new horizons in switching frequency and losses. one employment was a realisation of high current linear post-regulators in discrete forms. fig. 5 shows a solution with p-channel, and fig. 6 with n-channel transistor. good solutions from efficiency and performance point of view, they are scarce in reliability. besides it is expensive to add limiting current and thermal protection. with such a solution we reached the 90's. in '96 , the new l4955 family solved these remaining two problems. see fig. 7. v cesat v in v out v ref - + d97in600 figure 4. very low drop regulator with pnp transistor v in v out v ref - + d97in601 figure 5. discrete p-channel mosfet regulator v in v out =+5v v ref - + d97in602 +12v figure 6. discrete n-channel mosfet regulator v in v out v ref - + d97in603 charge pump current limiting thermal shutdown figure 7. n-channel mosfet integrated regulator (l4955) AN932 application note 3/20 l4955, device description fig. 8 shows the block diagram. pin description pin1, in (input supply voltage) . this is the unregulated input dc voltage. for stability reasons a 10uf min. capacitor value is required. pin2, cl (current limiting). the device is provided with two different current limiting functions, programmable and fixed . an external resistor rcl (+/-1%, 1/4w), connected between pin2 and ground, sets the requested current limiting threshold to a typical value given by : i lim = 39.69 r cl [a] with r cl [k w] in program. c.l. pre regulator v ref = 1.26v + - e/a out adj gnd pg cl d96in366 1(1) 3 26 4(2) 5 7(3) pin x = heptawatt pin (x) = versawatt inhibit active high 1.26v inh v in 10 m f fixed c.l. thermal shutdown foldback buffer charge pump power dmos 150m w + - v ref + - 0.9v ref r1 22 m f r2 v out r cl (1/4w, 1%) figure 8. block diagram + - + - i s 10i cl i cl v ref r s 2 1 7 out in cl i cl r cl (w) 1 4 sense power i s i out i p d97in556 r cl i cl =v ref r a ? 10i cl =r s i s i s = 10v ref r a r s r cl ? n= i p i s i out =i p +i s = (n+1)i s i out = 10(n+1)v ref r a r s ? 1 r cl l4955 figure 9. programmable current limiting circuit. AN932 application note 4/20 so we get the following table : r cl ( w )i lim (a) 13k 3 19k 2 40k 1 47k 0.85 the programmable current limiting has a constant current characteristic, without foldback effect. the programmable current limit is guaranteedonly in the range of rcl between 13k w and 47k w (see fig 10), with a guaranteed accuracy of about 20%. a difference of about 200ma between the load current and the set current limit is necessary to separate at all the current from the voltage loop maintaning the regulated output voltage at the load current. it is not recommended to use resistor values out of the above mentioned range. the pin cannot be left floating; when not used, it has to be connected to gnd. fig.11 shows the output current available vs. resistor value. in programmable current limiting with r cl =13k w the dropout has to be higher than 1.5v, otherwise the current limit is about 6.3a. this mini- mum drop to enable the programmable current limiting, can be reduced at about 1.1v with r cl = 47k w . by connecting pin 2 to ground the programmable current limiting is overridden by the fixed current limitation ( 6.3a +/-20%). a foldback function (typ. 1.8a), see figure 12, protects against load short- circuits and limits the power dissipation. the fold- back circuit starts to reduce the short-circuit cur- rent when the output voltage at the pin7 , falls below 80% of the regulated value. pin3, inh (inhibit). this function allows to turn the regulator off , with a consumption of only 120 m a. it can be switched to a frequency up to 5khz. it is a ttl-cmos compatible input, active high, disac- tivating all the blocks except the internal band-gap (see fig. 13). 0.85 3 i out (a) 100 v out (%) d97in564b r cl r cl gnd 24 l4955 r cl figure 10. programmable current limit. 13 20 30 40 47 r cl (k w ) 0 0.5 1 1.5 2 2.5 3 i out (a) d97in539a figure 11. output current available vs resis- tor value. 1.8 6.3 i out (a) 100 v out (%) d97in565a cl gnd 24 l4955 80% v out figure 12. internal current limiting. AN932 application note 5/20 this function, see fig 14, is realised by a comparator with a threshold of 1.2v and 200mv of histeresys. the internal bias sink current is 20ua. the pin can be left open because an internal pull-down insures the correct functionality. pin4, (gnd). this is the ground pin of the device. it has to be connected close to the load to improve regulation. the quiescent current flowing from this pin is a couple of ma, irrespective of the load current. when in- hibit is activated, the current flowing from this pin is about 120 m a. pin5, adj (adjust). this pin, with the help of a voltage divider, is used to adjust the output voltage. the output voltage range can go from a min of 1.26v to vin-vdrop. the output regulated voltage can be calculated as follows: v out =( r 1 + r 2 ) ? i 1 = ? ? ? r 1 r 2 + 1 ? ? ? ? v ref the r2 value can be determined by fixing the current, i 1 , circulating in it (see fig. 15): r 2 = v ref i 1 = 1260 i 1 [ w ]i 1 [ma] and so: r 1 = r 2 ? ? ? ? v out 1.260 - 1 ? ? ? [ w ]v out [v] pin6, pg (power good). this pin is activated (low) when the vadj voltage value is lower than 10% of its nominal value. this means also an output voltage 10% lower than the selected nominal value (see fig. 16). this output can also be used as a flag in case of overcurrent conditions. pg signal can be used to initialise the operation of a m p. 3 inh internal pull down d97in558 l4955 v ref i this output disable all the blocks except v ref v in figure 13. inhibit circuit. v inh vref = 1.26v hyst = 200mv regulator off t t regulator on regulator on d96in365a figure 14. inhibit function + - i 1 r 1 1 7 out in gnd buffer charge pump d97in557 l4955 r 2 v ref = 1.26v 5 adj op amp 4 v out figure 15. AN932 application note 6/20 the circuit, see fig 17, is realised by a comparator with hysteresis of 200mv and an open drain output. the output resistance of the power good is 100 w max. at t j =125 c. pin7, out. regulated output voltage. the minimum electrolytic capacitor required for stability is 22 m f. thermal shutdown the thermal protection is an internal hysteretic function which turn off the device when the junction tem- perature exceeds 150 c. hysteresys is around 20 c. protection diode in normal operation, the l4955 family does not need any external protection diode between input and out- put. the internal body diode between input and out- put can handle current of about 10a for milliseconds. for example, if vout = 12v, an instantaneous short circuit to the input pin1 with large output capacitor value, such as 880 m f, does not damage the device. it needs protection diode (see fig. 18) only for high value of output capacitors (bigger than 1000 m f). demoboard l4955 heptawatt to evaluate the device dynamic behaviours, a demoboard has been designed and optimised for this point of view. the electrical schematic diagram is shown in, fig.19. the demo, in any case, can house both smd or through-hole capacitors, for testing in different condi- tions, standard and extreme. to obtain excellent performance under very fast load transients, it is mandatory the minimisation of the distributed inductance and of course the resistance too. due to these two constrains, a double side pcb has been laid out. pg v adj 0.9 v adj hyst = 200mv high low low t t d96in364b v out =v adj (r1+r2)/r2 figure 16. power good function. 6 pg d97in559 l4955 0.9 v ref + - 5 adj v ref= 1.26v + - e/a figure 17. power good circuit. l4955 in v in 17 out adj 5 4 2 v out c2 c1 r1 r2 gnd cl d97in604 figure 18. protection diode. c1,c2 470 m f/25v panasonic hfq r4 r3 c4 to c9 100 m f/10v avx tps 6 each c10 to c15 1 m f avx x7r 6 each vout vin 1 2 in cl gnd 43 inh 7 out 5 adj l4955 pg 6 d97in546a r2 led r1 figure 19. demo circuit schematic. AN932 application note 7/20 figure 20. printed demo board (scale 1:1). component side layer 1 layer 2 AN932 application note 8/20 the output capacitors have to be chosen with low esr, like smd tantalyum which are a good compro- mise between low esr, cost and size. the smd solution permits to avoid the vias inductances. it is useful to put low esl capacitors very close to to the output connector. the input capacitors, have to be chosen with low esr to avoid the drop of the supply voltage during the load transient. the resistors divider of the voltage feedback, connected directly to the load ground, allows the separa- tion of sensing and forcing avoiding to sense the drop voltage of the power paths. here follow some load transient responsesobtained with the demoboard l4955,full populated as in fig. 19. load transient responses figure 21. test condition: v in = 5v, v out = 3.3v; load transient from 0.5a to 5a; di out dt = 20a M m s; t j =25 c AN932 application note 9/20 figure 22. test condition: v in =6. 5v, v out = 5v; load transient from 0.5a to 5a; di out dt = 20a M m s; t j =25 c figure 23. test condition: v in =6. 5v, v out = 5v; load transient from 0.5a to 5a; di out dt = 1a M m s; t j =25 c AN932 application note 10/20 application ideas parallel regulators the l4955 regulators can be paralleled as in the schematic cir- cuit of fig. 24. this application can de- liver up to 10a of out- put current. this so- lution improves the efficiency and the output current capa- bility and it allows to distribute the power dissipation. for ex- ample, assuming v in = 13.5v, v out = 12v, i out = 10a, the out- put power delivered to the load is 120w. the total power dissi- pation is around 16w and the total effi- ciency is h = 88%. soft start fig. 25 shows a simple solution to obtain a soft-start at regulator turn on. at start up, the output voltage step up to vadj + vd1, then the charging of c1 in parallel with r1 regu- lates the rising sharp of the output voltage, by the time constant r1c1. for example, if vout = 8.4v, c1 = 330nf and r1 = 68k w the soft-start time of the output is about 4r1c1 @ 90ms (see fig. 26). the diode d1 is used to decouple the c1 capacitor from the feedback network after the start up. the diode d2, in short circuit condition, by-passes r2 and so c1 is fast discharged improving the recov- ery time. moreover d2 avoids dangerous negative voltage at pin vadj during the short circuit current re- circulation. iout up to 10a fb 10nf cf 1/2 lm358 3 2 + 1 - rf 100k 100k 100 m f in out fb l4955 vin gnd cl rs 20 m w in out l4955 gnd cl rs 20 m w 100 m f 100 m f 100 m f 100nf vin 8 4 2 2 1 1 4 4 7 5 5 7 d98in926 figure 24. parallel regulators. 22 m f r1 68k r2 12k c1 330nf 33 m f v out vin 1 2 in cl gnd 4 7 out 5 adj l4955 d97in605 d1 d2 r load figure 25. AN932 application note 11/20 programmable current regulator by connecting pin5, adj, to ground, the de- vice works as a current regulator (see fig.27). the output current is fixed by rcl to a typ. value given by : i out = 39.69 r cl [a] with r cl [k w ] if pin2 , rcl, is grounded the current limit is the foldback value of around 1.8a. the output voltage can reach a maximum value given by the difference between vin and the dropout voltage, which depends on iout. light controller by putting a photo resistor in parallel with r2 (see fig.28), the output voltage is controlled by the brightness of the surrounding enviroment. in particular in this application the output volt- age increases as the brightness increases. figure 26. c1 c2 vout vin r cl 1 2 in cl gnd 43 inh 7 out 5 adj l4955 pg 6 d97in541 figure 27. v in vout 1 in gnd 4 7 out l4955 pg 6 d97in568a r1 r2 5 adj figure 28. AN932 application note 12/20 precise current regulator power am modulator high current voltage regulator in applications in which the required output cur- rent can be higher than 5a, or to reduce the power dissipation of the l4955, an efficient solu- tion is shown in fig 31. the l4955 drives the base of a npn transistor (2n3055). this configuration can deliver up to 10a . this application holds the l4955 functions of cur- rent limiting, inhibit and power good. the current limitation can be obtained with the fixed current limiting, selectable with rcl, which limits the base current, ib, and so the output cur- rent . the inhibit function, pin 3, allows to turn off the bi- polar transistor. to fix these concepts let us consider two exam- ples: example 1. electrical spec. vout = 5v and iout = 8a using l4955 plus 2n3055, the thermal balance is (considering the l4955 max rdson = 300mohm @125 c): pdmax = vce ? io = 16w (@ b=5) for 2n3055 pdmax = io 2 ? rdson= 0.8w for l4955 total power dissipation @ 17w minimum input voltage = 7v note: this specification cannot be met by using l4955 stand alone. vin r load 1 2 in cl gnd 43 inh 7 out 5 adj l4955 pg 6 d97in560 r1 v o i q i o v ref r 1 i o <5.1a i o =v ref /r 1 +i q figure 29. vin 1 2 in cl gnd 43 inh 7 out 5 adj l4955 pg 6 d97in561 r b i o v o c in i b 2n3055 r 1 r 2 c o r cl figure 31. vin 1 2 in cl gnd 4 3 inh 7 out 5 adj l4955 pg 6 d97in562 v o c 1 r 1 c 2 r 2 v o t 330nf 56 w figure 30. example 2. electrical spec. vout = 5v and iout = 4a using l4955 and 2n3055 : pdmax = io 2 ? rdson @ 0.5w for l4955 pdmax = vce ? io = 5.2w for 2n3055 total power dissipation @ 6w minimum input voltage = 6.3v using l4955 stand alone : pdmax = io ? vdropmax = 5 ? 1.2 = 6w minimum input voltage = 6.2v note: the total amount power dissipation is simi- lar but it is moved on the external. AN932 application note 13/20 digital output voltage selection low cost battery charger in fig. 33 is showed a low-cost battery charger application. the rcl sets the charging current and the resistor divider determines the final charging voltage to a value given by: ? ? ? r 1 + r 2 r 2 ? ? ? ? ( v ref + r 3 ? i q ) where iq is the device quiescent current. the schottky diode, d2, prevents the discharge of the battery through the device when this is off. the di- ode d1 limits the reverse current through the regulator if the battery is reverse connected. high input and output voltage regula- tor fig. 34 shows a solution for input supply higher than device max supply voltage. this schematic combines also higher output volt- age. the input voltage is reduced by the vceon of a npn power transistor. the current target of the applica- tion must take into account the dissipated power of this transistor. the high output voltage is obtained with the diode zener z2. the diode d1 provides output short-cir- cuit protection. compensation of voltage drop along the wires when it is not possible to use sensing and forcing to compensate load wiring connections, but only two wires are allowed to supply the load, the schematic of fig. 35. reaches the goal. if the resistance of the line, rz, is known, using the resistor rk (see fig. 34), the output voltage vout can be expressed as : v out = r k ? r 1 r 2 ( i load + i q ) + r 1 + r 2 r 2 v adj theloadvoltage,v l ,is: v l =v out -r z ? i load vin 1 2 in cl gnd 4 3 inh 7 out 5 adj l4955 pg 6 d97in563 v o c 1 r 1 c 2 r 2 r 3 r 4 r 5 inputs figure 32. c1 vin 1 2 in cl gnd 43 inh 7 out 5 adj l4955 pg 6 r1 r2 vout r3 d2 d97in543a d1 r cl iq figure 33. c1 vin r1 r2 d1 c2 vout z2 1 2 in cl gnd 43 inh 7 out 5 adj l4955 pg 6 d97in544 r cl z1 c3 r3 t1 figure 34. AN932 application note 14/20 substituting the vout espression, we get : v l = r k ? r 1 r 2 i load - r z ? i load + r k ? r 1 r 2 i q + r 1 + r 2 r 2 v adj if the voltage v l has to be constant versus the load current, we have to impose the below condition : r k ? r 1 r 2 - r z = 0 solving for r k , we obtain: r k = r 2 ? r z r 1 finally, the regulated load voltage vl is: v l = r z ? i q + r 1 + r 2 r 2 v adj fig. 36 sh ows v out and v l versus load current. l4955 versawatt the fixed output voltage versions, (3.3v, 5.1v, 12v) are available in 3-pin versawatt package (see fig. 37). these versions (l4955vxxx) are provided with internal fixed current limiting . the power stage is totally equivalent to the heptawatt version, i.e., typical rdson of 150mohm @25 c. the same dynamic performance and thermal shut- down function are guaranteed too. the minimum supply voltage is the output voltage plus the max guaranteed dropout voltage, and in any case, min. supply has to be higher than 4.5v. fig.37 shows the typical application circuit. 2 in cl gnd 43 inh 7 out 5 adj l4955 r1 v out rk rl rz r2 vin vl 6 1 pg d97in545a in i q i load figure 35. 0123456i out (a) v out (v) d97in569a v out v l r z ? i load figure 36. l4955vxxx gnd out in 3 2 1 c1 v in c2 v out d97in590 figure 37. AN932 application note 15/20 demoboard l4955 versawatt for evaluation purpose, a dedicated demoboard has been realised. the electrical schematic is shown in, fig.38. figure 39. printed demo board (scale 1:1) c1,c2 470 m f panasonic hfq c3 to c8 100 m f avx tps 6 each c9 to c14 1 m f avx x7r 6 each vout vin 1 in gnd 2 3 out l4955vxxx d97in606a figure 38. component side layer1 layer2 AN932 application note 16/20 application ideas computer power supply power am modulator high input and output voltage regulator in fig. 42 it is shown a solution to applications, which require input and output voltages high than the de- vice allowable ones. the high input voltage is reduced by the vceon of a npn power transistor. the current target of the appli- cation must take into account the dissipated power of this transistor. the high output voltage is obtained with the diode zener z 2 , which increases the output voltage of vz. the diode d1 provides output short-circuit protection. positive and negative power supply positive and negative power supply can be obtained in the following fig. 43. if the rload is connected between +vxx and -vxx, and if one regulators starts ealier than the other one, the output voltage of the slower one becomes negative. the protection diodes d1, d2 are used to re- duce the negative voltage avoiding the device latch-up. l1 pwm controller section +hv -hv l2 2 3 1 l3 l4955v12 in out gnd v out = 12v/4a d97in607a isolated feedback 5v/20a figure 40. 1 in gnd 2 3 out l4955vxxx d97in566a v xx load v out t 330nf 56 w figure 41. c 1 v in c 2 vout z 2 1 in gnd 2 3 out l4955vxxx d97in567a z 1 c 3 r1 t 1 d 1 figure 42. AN932 application note 17/20 thermal design the target of this thermal design is to dimension the correct heatsink requirements. the design needs the following parameters of the application: - maximum input voltage, vin - minimum output voltage, vout - maximum output current, iout - maximum ambient temperature, tamb the heatsink thermal resistance has to be chosen so that the junction temperature of the device, in con- dition of maximum power dissipation expected for the application, is less than 125 c. the maximum power which can be dissipated in the application, p d , is given by : p d =(v in -v out ) ? i out the internal power consumption caused by the quiescent current can be neglected : in the worst case (vin = 22v and iq = 3ma) the power dissipation is only 66mw. in short circuit condition, the fixed current limitation with its foldback characteristic limits the power dissi- pation but the dissipated power can reach higher values than in the pd formula. it happens if : p d =(v in -v out ) ? i out the heatsink can be dimensioned with the following formula : r ths = t j - t a p d - r thj - c for example a typical application for the l4955 is : vin = 6.5v vout = 5v iout = 5a tamb = 50 c if we want to maintain t j @ 100 c, we can use a heatsink with : r ths @ 4 c/w. p d r thj-c r thc-s r ths-a r ths t a t j d97in610a figure 44. AN932 application note 19/20 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 1998 stmicroelectronics printed in italy all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco - the netherlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. AN932 application note 20/20 |
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